1. Field of the Invention
The present invention relates to a silicon-germanium (SiGe) semiconductor device and a method of manufacturing the same, and more particularly, to a SiGe semiconductor device in which a base electrode on which a silicide layer is formed extends under an emitter electrode, and a method of manufacturing the same.
2. Discussion of Related Art
A SiGe semiconductor device has an advantage of easy control of physical properties, such as an energy band and the mobility of carriers. The rapid development of SiGe semiconductor-related technology has led to practical use of SiGe heterojunction bipolar transistors (HBTs) for ultrahigh-frequency (UHF) circuits required for wireless communications and optical communications and active devices, such as high-speed electronic devices. SiGe HBTs were successfully commercially available before other Si heterojunction devices. The manufacturing technology of SiGe HBTs was sufficiently developed, so that the SiGe HBTs began to compete with Group III-V compound semiconductor devices in yield, reliability, integration density, and production cost. Thus, a variety of SiGe HBTs have already been fit to be practically applied to digital devices, analog devices, radio-frequency (RF) devices, and photoelectric devices.
Conventional SiGe HBTs may be classified into self-aligned SiGe HBTs and non-self-aligned SiGe HBTs. Hereinafter, the structures of conventional self-aligned SiGe HBTs will be described with reference to FIGS. 1A and 1B.
FIGS. 1A and 1B are cross-sectional views of conventional self-aligned SiGe HBTs.
In order to manufacture the self-aligned SiGe HBT shown in FIG. 1A, initially, a buried collector 11, a collector 12, a first collector electrode 14, and an isolation layer 13 are formed on a p-type Si substrate 10. Next, a SiGe base layer 15 is formed on the collector 12 and the isolation layer 13. In this case, a single crystalline base epitaxial layer is formed on the collector 12 and a polycrystalline base layer is formed on the isolation layer 13 to form a base electrode.
Thereafter, a photoresist pattern for defining a base electrode region is formed using photolithography and etching processes, and the polycrystalline base layer except the base electrode region is removed using the photoresist pattern as an etch mask. Then, the photoresist pattern is removed. An oxide layer 16 is deposited on the SiGe base layer 15 and patterned to form an opening for an emitter-base junction. Next, a polycrystalline Si (poly-Si) layer to be an emitter and an emitter electrode are deposited, and then patterned to form an emitter electrode 17a. In this case, the poly-Si layer to be an emitter electrode is also used to form a second collector electrode 17b. 
Subsequently, the oxide layer 16 is etched using the emitter electrode 17a as an etch mask, thereby exposing the SiGe base layer 15. Thereafter, BF2 ions are doped using the emitter electrode 17a as a mask. The doped B ions are thermally treated to form an external base 18, which functions to reduce resistance between the base layer 15 and a metal base electrode. An oxide layer is then deposited and etched by an anisotropic dry etching process, thereby forming a spacer on a sidewall of the emitter electrode 17a. A titanium (Ti) layer is coated on the SiGe base layer 15, the emitter electrode 17a and the first collector electrode 14, and thermally treated to form a silicide thin layer 20. After that, the remaining Ti which is unreacted during the formation of the silicide thin layer 20 on the spacer 19 and the isolation layer 13 is removed by a wet etching process. An insulating passivation layer 21 having a plurality of contact holes is formed on the p-type Si substrate 10 having the silicide thin layer 20, and metal interconnections are formed to be electrically connected to the respective electrodes through the contact holes. During a metal interconnection process, a base terminal 22, an emitter terminal 23, and a collector terminal 24 are formed.
In the conventional self-aligned SiGe HBT shown in FIG. 1A, the emitter-base junction can be formed in a self-aligned manner, and the silicide thin layer 20 having low resistance is used as an electrode, thereby greatly reducing contact resistance and parasitic resistance of the base electrode.
However, since the base electrode has a small thickness, agglomeration occurs during the formation of the silicide thin layer 20, so that the silicide thin layer 20 penetrates the base electrode and electrically comes into contact with the collector 12. In order to solve the above-described problem, there is provided a self-aligned SiGe HBT shown in FIG. 1B, which includes a thick base electrode to minimize resistance and prevent occurrence of agglomeration during the formation of the silicide thin layer 20.
In order to manufacture the self-aligned SiGe HBT shown in FIG. 1B, initially, a buried collector region is defined on a p-type Si substrate 30. The buried collector region is doped with n-type impurity ions, such as As ions and then thermally treated to form a buried collector 31, and an isolation layer 33 is formed. Thereafter, a region for a first collector electrode 34 is defined and doped with n-type impurity ions to form the first collector electrode 34. In this case, the first collector electrode 34 is connected to the buried collector 31. Next, a p-type poly-Si layer for a base electrode 36 is grown on the entire resultant structure having the first collector electrode 34. In this case, process conditions are controlled such that a p-type Si epitaxial layer is grown on a collector layer 32 and the first collector electrode 34 and a p-type poly-Si layer is grown on the isolation layer 33. Thereafter, an insulating layer 37, which is formed of a nitride layer or an oxide layer, is coated on the p-type Si epitaxial layer and the p-type poly-Si layer. The whole insulating layer 37 and a portion of the p-type Si epitaxial layer are sequentially etched, thereby forming a groove for forming a base-collector junction and an emitter-base junction. An insulating layer, such as an oxide layer or a nitride layer, is coated on the entire surface of the resultant structure and then etched by an anisotropic dry etching process, thereby forming a spacer 38 on an inner sidewall of the groove. The p-type Si epitaxial layer remaining on the bottom of the groove is completely etched using the insulating layer and the spacer 38 as an etch mask, thereby exposing a predetermined portion of the collector layer 32. Thereafter, a base epitaxial layer 39 is grown on the exposed portion of the collector layer 32 using a selective single crystalline growth technique. An n-type poly-Si layer for an emitter electrode 40a is deposited on the entire surface of the p-type Si substrate 30 and patterned, thereby forming the emitter electrode 40a and a second collector electrode 40b on the base epitaxial layer 39 and the first collector electrode 34, respectively. Subsequently, the insulating layer is etched using the emitter electrode 40a as an etch mask, thereby exposing the p-type poly-Si layer. An insulating spacer 41a is formed on a sidewall of an end portion of the emitter electrode 40a, and an insulating spacer 41b is formed on a sidewall of an end portion of the second collector electrode 40b. A silicide thin layer 42 is formed and an ordinary metal interconnection process is performed.
The self-aligned SiGe HBT shown in FIG. 1B has the base electrode 36 with a great thickness, thereby preventing agglomeration generating during the formation of the silicide thin layer 42. However, since a region where the base epitaxial layer 39 will be formed should be defined using a dual etching process, process reliability may be degraded. Also, the selective single crystalline growth process for forming the base epitaxial layer 39 is performed at low speed and difficult to control, thereby deteriorating the economical efficiency and reproducibility. Also, although the base electrode 36 becomes thick, a region of the base electrode 36 on which the silicide thin layer 42 is formed is present only outside the spacer 41a formed on the sidewall of the emitter electrode 40a, thereby resulting in an immaterial decrease in parasitic resistance of the base electrode 36.
FIG. 2 is an enlarged partial cross-sectional view for explaining a parasitic resistance element of a base electrode disposed between a base-emitter junction and a base terminal.
As compared with other Si semiconductor devices, a SiGe semiconductor device is high in ratio of critical frequency to the maximum oscillation frequency, i.e., ft/fmax and in early voltage, and can exactly control a base-emitter junction and accelerate electrons due to a high electric field applied to the base. In particular, the maximum oscillation frequency fmax is shown in Equation 1, and determined by base parasitic resistance Rb between the base-emitter junction and a base terminal and junction capacitance Cjc between a collector and a base.
                              f          max                =                              ft                          8              ⁢              π              ⁢                                                          ⁢                              C                jc                            ⁢                              R                b                                                                        <                  Equation          ⁢                                          ⁢          1                >            
In a conventional HBT, the base parasitic resistance Rb can be expressed by the sum of resistances R1, R2, and R3 shown in FIG. 2, and higher resistances R2 and R3 significantly affect the maximum oscillation frequency fmax. Here, R3 denotes the resistance of a SiGe base epitaxial layer, R2 denotes the resistance of an external base obtained by doping impurity ions into the SiGe base epitaxial layer to which an emitter electrode is self-aligned, and R1 denotes the resistance of a metal silicide thin layer formed after doping the impurity ions into the SiGe base epitaxial layer. The resistance R2 is much higher than the resistance R1 and lower than the resistance R3. As a result, during manufacture of the SiGe HBT, as the resistances R2 and R3 increase, the parasitic resistance element of the base electrode increases.